Debug Soc Design Engineer • Mid-Level

Who you are

You have a Bachelor's degree and 3+ years of relevant experience in SoC design, with a strong familiarity with the ASIC design flow. Your knowledge of digital design principles allows you to contribute effectively to the development of high-performance, low-power wireless systems. You thrive in collaborative environments, working closely with cross-functional teams to ensure that design goals are met. Your ability to guide validation engineers in diagnosing issues showcases your expertise in debug features and their implementation.

Desirable

Experience with energy-efficient design and an understanding of RF/Analog architecture will be advantageous. Familiarity with VLSI/RTL design and integration is also a plus, as it complements your existing skill set in SoC development.

What you'll do

In this role, you will be part of a small team focused on designing CPU-based subsystems for wireless SoCs. You will collaborate with SoC architects and IP developers to define and implement debug features that align with power, performance, and area goals. Your responsibilities will include owning the design for the debug and trace hub, ensuring that all subsystems incorporate the necessary debug features. You will also guide validation engineers in utilizing these features effectively to diagnose and resolve issues, playing a critical role in the ASIC debug efforts.

What we offer

Apple provides a dynamic work environment where innovation thrives. You will have the opportunity to work on cutting-edge technologies that transform user experiences. The company values collaboration and encourages you to apply even if your experience doesn't match every requirement. Join a world-class engineering team dedicated to pushing the boundaries of wireless silicon development.