Hardware Engineer

Who you are

You have a strong background in frontend STA engineering, with experience in constraint development and timing analysis. You understand the intricacies of digital design and mixed-signal design, and you are adept at collaborating with RTL designers and physical design teams to achieve optimal results.

Your expertise allows you to effectively communicate design intent and clock structures, ensuring that power, performance, and area are optimized in your projects. You are detail-oriented and committed to achieving sign-off quality of timing constraints based on stakeholder requirements.

What you'll do

In this role, you will be responsible for developing constraints for synthesis, PnR, and sign-off STA. You will work on both partition-level and SoC-level designs, verifying results post-synthesis for all STA modes. Your collaboration with digital designers will be crucial in understanding design intent and optimizing the overall design process.

You will serve as the link between various design teams, ensuring that all aspects of the design are aligned and that timing constraints meet the necessary quality standards. Your contributions will play a vital role in the success of the Cellular SoC Integration team, as you work on cutting-edge technology nodes and sophisticated designs.

What we offer

At Apple, you will be part of a team that values innovation and collaboration. You will have the opportunity to work with some of the brightest minds in the industry, contributing to products that redefine entire industries. We encourage you to apply even if your experience doesn't match every requirement, as we believe in the strength of diverse perspectives and backgrounds.