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Key Highlights
- Over 100,000 employees globally
- Headquartered in Mountain View, California
- Parent company Alphabet Inc. valued at $1.5 trillion
- Google Cloud Platform serves millions of customers
Google LLC, headquartered in Mountain View, California, is a global leader in internet-related services and products, including its flagship search engine, Google Search, and the Android operating system. With over 100,000 employees, Google also offers cloud computing services through Google Cloud P...
🎁 Benefits
Google offers competitive salaries, equity options, generous PTO policies, comprehensive health benefits, and a remote work policy that allows flexibi...
🌟 Culture
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Skills & Technologies
Overview
Google is hiring a RTL Design Technical Lead to oversee the design activities at IPs, SubSystems, and SoCs. You'll work with RTL design, synthesis techniques, and lead a team of designers in Tel Aviv or Haifa.
Job Description
Who you are
You have a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, along with 8 years of experience in the RTL Design cycle from IP to SoC and from specification to production. Your background includes 8 years of technical leadership, showcasing your ability to guide teams through complex design processes. You possess deep expertise in RTL Design, Design Quality checks, and the Physical Design aspects of RTL coding, ensuring high standards in your work. Your experience with synthesis techniques to improve RTL code performance and power, as well as low-power design techniques, sets you apart as a candidate. You are knowledgeable in Design For Test and understand its impact on Design and Physical Design, which is crucial for ensuring product reliability. Additionally, you have experience with scripting languages like Python or Perl, which aids in automating design processes and improving efficiency.
What you'll do
In this role, you will lead the Design Activities at IPs, SubSystems, and SoCs, planning, executing, and tracking progress while assuring quality and reporting the status of assigned activities. You will define the Block/SoC level design documents such as Micro Architectural Specifications, ensuring clarity and precision in design expectations. Your leadership will extend to managing a team of designers, both directly and in collaborative settings, fostering an environment of innovation and excellence. You will own IP, S, and SoC strategies for clocks, resets, and debugging, enforcing global methodologies and driving enhancements across the design process. Your contributions will be pivotal in shaping the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration for Google's direct-to-consumer products.
What we offer
At Google, you will be part of a team that pushes boundaries, developing custom silicon solutions that power the future of technology. You will collaborate with design and verification engineers on active projects, creating architecture definitions with RTL. This role offers the opportunity to contribute to products loved by millions worldwide, shaping the future of hardware experiences. We encourage you to apply even if your experience doesn't match every requirement, as we value diverse perspectives and backgrounds in our teams.
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