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Graphcore • Bristol
Graphcore is hiring a DFT Engineer to work on next-generation AI designs targeted for data center applications. You'll leverage your expertise in Design for Testability and related methodologies. This role requires a strong technical background and hands-on experience in DFT.

Apple • Cupertino - On-Site
Apple is hiring an ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design validation and integration. This position is suitable for entry-level candidates with relevant coursework.

Apple • Cupertino - On-Site
Apple is hiring an ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 3+ years of experience in ASIC design.

Apple • Cupertino - On-Site
Apple is hiring a Senior ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 8+ years of experience in ASIC design.

Google • Tel Aviv
Google is hiring a RTL Design Technical Lead to oversee the design activities at IPs, SubSystems, and SoCs. You'll work with RTL design, synthesis techniques, and lead a team of designers in Tel Aviv or Haifa.

Amazon • Austin - On-Site
Amazon is hiring a Senior ASIC Design Engineer for the Amazon Leo initiative to develop custom ASIC blocks for satellite technology. You'll work with RTL design, gate-level simulation, and SoC integration in Austin, Texas.

Apple • Beaverton - On-Site
Apple is hiring a Senior ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 8+ years of experience in ASIC design.

Apple • Beaverton - On-Site
Apple is hiring a Senior ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of their products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 8+ years of experience in ASIC design.

Apple • Cupertino - On-Site
Apple is hiring an ASIC Design Engineer to work on Pixel IP DMA, focusing on designing high-performance, low-power DMA engines. You'll collaborate with architecture, design, and verification teams to enhance performance and efficiency.

Apple • Irvine - On-Site
Apple is hiring a Debug SoC Design Engineer to work on CPU-based subsystems for high-performance, low-power wireless SoCs. You'll collaborate with SoC architects and IP developers to define debug features and guide validation engineers. This role requires 10+ years of relevant experience.

Apple • Cupertino - On-Site
Apple is hiring an ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 3+ years of experience in ASIC design.

Apple • California - On-Site
Apple is hiring a Senior Wireless RTL Design Engineer to join their wireless silicon development team. You'll focus on developing signal processing designs for wireless communication SoCs, requiring expertise in DSP and RTL design.

Apple • Austin - On-Site
Apple is hiring a SoC RTL Design Engineer to work on chip design and implementation. You'll collaborate with architecture teams and ensure high-quality components for SoCs. This role requires in-depth knowledge of digital logic design and microarchitecture.

Apple • Munich - On-Site
Apple is hiring an Experienced AMS Digital Design Engineer to work on innovative RTL designs for high-performance applications. You'll collaborate with teams to implement digital functions using Verilog and contribute to all phases of design and verification. This position requires experience in digital design and RTL.

Apple • Irvine - On-Site
Apple is hiring a PHY RTL Design Engineer to develop signal processing designs for wireless communication SoCs. You'll work with MATLAB and focus on power-efficient RTL logic design. This position requires 3+ years of relevant industry experience.

Apple • Irvine - On-Site
Apple is hiring a PHY RTL Design Engineer to develop signal processing designs for wireless communication SoCs. You'll work with MATLAB and focus on power-efficient RTL logic design. This position requires 3+ years of relevant industry experience.

Apple • Irvine - On-Site
Apple is hiring a PHY RTL Design Engineer to develop signal processing intensive designs for wireless communication SoCs. You'll work with MATLAB and RTL design to ensure power and area efficiency. This position requires 3+ years of relevant industry experience.

Apple • Irvine - On-Site
Apple is hiring a PHY RTL Design Engineer to develop signal processing designs for wireless communication SoCs. You'll work with MATLAB and focus on power-efficient RTL logic design. This position requires 3+ years of relevant industry experience.

Apple • Irvine - On-Site
Apple is hiring a PHY RTL Design Engineer to develop signal processing designs for wireless communication SoCs. You'll work with MATLAB and focus on power-efficient RTL logic design. This position requires 3+ years of relevant industry experience.

Apple • Irvine - On-Site
Apple is hiring a PHY RTL Design Engineer to develop signal processing designs for wireless communication SoCs. You'll work with MATLAB and RTL design to ensure power efficiency and performance. This position requires 3+ years of relevant industry experience.

Apple • London - On-Site
Apple is hiring a Junior RTL Power Optimisation Engineer to design and optimise power-efficient processors and SoCs. You'll work with power analysis tools and machine learning to enhance GPU performance. This role requires a good understanding of RTL design.

Apple • Austin - On-Site
Apple is hiring a DDR Design Engineer to craft innovative products that enrich people's lives. You'll be involved in all phases of design, from concept to silicon bring-up, focusing on high-performance, low-power applications. This role requires a BS degree and 3+ years of relevant experience.

Apple • Beaverton - On-Site
Apple is hiring an Analog Mixed Signal IP Integration Engineer to support the integration of third-party IP in SOCs. You'll work closely with cross-functional teams and external vendors to ensure high-quality standards. This role requires 7+ years of industry experience.

Baidu • Sunnyvale - On-Site
Baidu is hiring a Low Power SoC Hardware Architect to design and define lower power subsystems for AI engines. You'll collaborate with a world-class team to improve power efficiency in both data center and edge SoCs. This position requires expertise in power optimization and SoC design.