Soc Design Verification Engineer • Mid-Level

Who you are

You have a strong background in SoC design verification, with experience in integrating complex IP-level DV environments. Your expertise includes crafting highly reusable UVM testbenches and implementing effective coverage-driven test infrastructures. You are comfortable deploying new tools and methodologies, particularly in the context of AIML, to enhance verification processes.

You possess a deep understanding of various SOC architectures and high-speed layered protocols. Your knowledge extends to industry-standard methodologies for low-power architecture and outstanding DV methodologies. You are familiar with the complexities of multi-chip SOC debug architecture and have experience with Cellular protocols and FW-HW interactions.

What you'll do

As a SoC Design Verification Engineer at Apple, you will be at the forefront of verifying innovative Cellular SOCs. You will lead efforts to integrate multiple sophisticated IP-level DV environments, ensuring the highest quality of verification. Your role will involve crafting reusable UVM testbenches and implementing coverage-driven test infrastructures to improve the overall quality of SOC designs.

You will collaborate closely with other product development groups across Apple, pushing the boundaries of what complex SOC chips can achieve. Your contributions will directly impact the product experience for customers worldwide, as you work to enhance the performance and reliability of Apple’s flagship Cellular 5G platform.

What we offer

Apple offers a dynamic work environment where innovation is at the core of everything we do. You will have the opportunity to work on cutting-edge technology and be part of a team that is shaping the future of mobile communication. We encourage you to apply even if your experience doesn't match every requirement, as we value diverse perspectives and backgrounds in our team.