Tech Jobs

Graphcore • Bengaluru - On-Site

Graphcore is hiring a Principal Silicon Verification Engineer to lead verification activities within the silicon verification team. You'll work with System Verilog, Python, and C++ to ensure quality silicon delivery. This position requires 12-14 years of experience in engineering.

Google • Sunnyvale - On-Site

Google is hiring a Staff ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. You'll work with UVM and SystemVerilog to verify complex digital designs, particularly focusing on TPU architecture. This position requires 10 years of experience in verification methodologies.

Apple • Austin - On-Site

Apple is seeking a Design Verification Lead to guide high-caliber verification teams in developing cutting-edge silicon IPs. You'll provide technical leadership and implement verification strategies using SystemVerilog and UVM methodologies. This role requires significant experience in silicon design verification.

Microsoft • Raleigh

Microsoft is hiring a Senior Design Verification Engineer to join their Silicon, Cloud Hardware, and Infrastructure Engineering team. You'll work on pre-silicon verification and post-silicon validation for custom silicon components. This role requires expertise in Verification IP and UVM.

Apple • London - On-Site

Apple is hiring a Design Verification Engineer to ensure the quality of complex graphics IP designs. You'll work with C++, SystemVerilog, and UVM in the London office. This role requires a strong background in graphics or computer architecture.

Google • Mountain View - On-Site

Google is hiring a Senior Silicon Design Verification Engineer to work on YouTube Video Accelerators. You'll utilize SystemVerilog and UVM for verification methodologies and contribute to the development of custom silicon solutions. This position requires 8 years of experience in verification methodologies.

Google • Bengaluru - On-Site

Google is hiring a Silicon Design Verification Engineer to shape the future of AI/ML hardware acceleration. You'll work with verification methodologies and languages like UVM and SystemVerilog to verify complex digital designs. This position requires 4 years of experience in verification methodology and IP design.

Google • Bengaluru

Google is hiring an ASIC Silicon Design Verification Engineer III to lead the development of verification content and drive hardware-software co-verification strategies. You'll work with System Verilog and UVM in Bengaluru, India.

Apple • Sunnyvale - On-Site

Apple is hiring a Pre-Silicon Digital Verification Engineer to verify complex digital IPs for custom integrated circuits. You'll work with System Verilog and UVM to build verification plans and test cases. This role requires experience in digital ASICs and verification methodologies.

Amazon • Bengaluru - On-Site

Amazon is hiring a Senior Design Verification Engineer to enhance hardware designs for their devices. You'll define verification methodologies and implement test plans while collaborating with cross-functional teams. This role requires experience in verification at multiple levels of logic.

Amazon • Austin - On-Site

Amazon is hiring an ASIC Verification Engineer for the Leo Modem DV Team to implement and maintain pre-silicon verification environments for satellite communication systems. You'll work with System Verilog and UVM in Austin, Texas.

Google • Sunnyvale - On-Site

Google is hiring a Senior ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. You'll leverage your expertise in SystemVerilog and UVM to verify complex digital designs for Google's TPU technology. This position requires 8+ years of experience in design verification.

Google • Bengaluru

Google is hiring a Senior Design Verification Engineer to contribute to the development of custom silicon solutions. You'll work with Python, Perl, SystemVerilog, and UVM to automate verification environments and ensure high-quality designs. This role requires 8 years of experience in design verification.

Google • New Taipei City - On-Site

Google is hiring a Senior CPU Design Verification Engineer to develop custom silicon solutions that power innovative products. You'll work with UVM, SystemVerilog, and various scripting languages to ensure the performance and quality of modern processors. This position requires 8 years of experience in functional verification and processor microarchitecture.

Apple • Munich - On-Site

Apple is hiring a Senior Design Verification Engineer to work on mixed-signal designs in Munich. You'll be responsible for pre-silicon verification, including constructing verification environments and collaborating with design engineers. This role requires expertise in SystemVerilog and UVM.

Google • Tel Aviv

Google is seeking a Senior SoC Design Verification Engineer to develop custom silicon solutions for their products. You'll work with SystemVerilog and UVM to verify digital designs and enhance verification environments. This role requires 8 years of experience in verification methodologies.

Apple • London - On-Site

Apple is hiring a Senior Design Verification Engineer to work on mixed-signal designs in their London team. You'll be responsible for pre-silicon verification and developing self-checking verification environments using SystemVerilog and UVM.

Apple • Cupertino - On-Site

Apple is seeking a Design Verification Lead to drive technical engagements with silicon suppliers for mobile products. You'll work with modern verification languages like SystemVerilog and UVM. This role requires 10+ years of industry experience.

Amazon • San Diego - On-Site

Amazon is hiring a Senior Modem Design Verification Engineer for the Amazon Leo project to implement digital chip SOCs for satellite communications. You'll work with MATLAB, UVM, and SystemC to develop verification environments and test plans. This role requires expertise in modem design and verification.

Meta (Facebook) • Bangalore - On-Site

Meta (Facebook) • Bangalore - On-Site

Meta is hiring an ASIC Engineer for Design Verification to develop IP and SoC for data center applications. You'll work with UVM and other verification methods to ensure a bug-free design. This role requires experience in design verification.

Meta (Facebook) • Sunnyvale

Meta is hiring an ASIC Engineer for SoC Verification to develop novel ASIC solutions for data center applications. You'll work with UVM-based test bench development and various verification approaches. This role requires experience in Design Verification.

Apple • Munich - On-Site

Apple is hiring an Early Career Design Verification Engineer to enable bug-free first silicon for mixed-signal designs. You'll work closely with Digital and Analog Design engineers, utilizing SystemVerilog and UVM. This position is ideal for entry-level candidates passionate about hardware verification.

Meta (Facebook) • Sunnyvale - On-Site

Meta is hiring an ASIC Engineer specializing in Design Verification to develop IP and System On Chip (SoC) solutions for data center applications. You'll work with UVM and other verification methodologies to ensure a bug-free design.

Apple • Irvine - On-Site

Apple is hiring a Wireless Radio Verification Engineer to develop state-of-the-art WiFi SoCs. You'll ensure silicon success through sophisticated testbenches and verification methodologies. This position requires a minimum of 10 years of relevant industry experience.