
About Google
Empowering the world through technology and information
Key Highlights
- Over 100,000 employees globally
- Headquartered in Mountain View, California
- Parent company Alphabet Inc. valued at $1.5 trillion
- Google Cloud Platform serves millions of customers
Google LLC, headquartered in Mountain View, California, is a global leader in internet-related services and products, including its flagship search engine, Google Search, and the Android operating system. With over 100,000 employees, Google also offers cloud computing services through Google Cloud P...
🎁 Benefits
Google offers competitive salaries, equity options, generous PTO policies, comprehensive health benefits, and a remote work policy that allows flexibi...
🌟 Culture
Google is known for its engineering-first culture, emphasizing innovation and collaboration. The company fosters a unique environment that encourages ...
Skills & Technologies
Overview
Google is hiring a Senior ASIC RTL Engineer to develop custom silicon solutions for their products. You'll work with Verilog, SystemVerilog, and ASIC design methodologies. This position requires 8 years of experience in digital logic design.
Job Description
Who you are
You have a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. With 8 years of experience in digital logic design principles and RTL design concepts, you are well-versed in languages such as Verilog or SystemVerilog. Your expertise extends to ASIC design methodologies and QA flows, including Lint, CDC, RDC, and VCLP, as well as defining design constraints (SDC) and low-power intent (UPF). You are also familiar with scripting languages like Perl or Python, which enhances your ability to automate tasks and streamline processes.
Your background includes experience in the design and development of audio blocks or Mobile Industry Processor Interface (MIPI) display or camera sub-systems. You thrive in collaborative environments and are eager to contribute to a team that pushes boundaries in developing innovative hardware solutions. You are passionate about shaping the next generation of hardware experiences that deliver unparalleled performance and efficiency.
Desirable
A Master's or PhD degree in Electrical Engineering, Computer Engineering, or Computer Science is preferred, as it demonstrates your commitment to advancing your knowledge in the field. Experience with additional design methodologies or tools will set you apart as a candidate who can bring even more value to the team.
What you'll do
As a Senior ASIC RTL Engineer at Google, you will perform Verilog/SystemVerilog Register-Transfer Level (RTL) coding and engage in functional and performance simulation debugging. You will conduct Lint, CDC, and VCLP checks to ensure the integrity and quality of your designs. Your role will involve participating in test planning and coverage analysis, where you will develop RTL implementations that meet power, performance, and area goals.
You will also participate in synthesis and timing/power closure, supporting both pre-silicon and post-silicon bring-up processes. Collaborating with multi-disciplined and multi-site teams, you will contribute to the innovation behind products loved by millions worldwide. Your work will directly impact the performance and efficiency of Google's direct-to-consumer products, making your contributions vital to the company's success.
What we offer
At Google, you will be part of a dynamic team that values innovation and collaboration. You will have the opportunity to work on cutting-edge technologies and contribute to projects that shape the future of computing. We encourage you to apply even if your experience doesn't match every requirement, as we value diverse perspectives and backgrounds. Join us in our mission to create seamless and impactful user experiences through advanced hardware solutions.
Interested in this role?
Apply now or save it for later. Get alerts for similar jobs at Google.
Similar Jobs You Might Like
Based on your interests and this role

Hardware Engineer
Google is seeking a Senior ASIC RTL Engineer to integrate and automate flows of sub-systems and component IPs. You'll work with Verilog, SystemVerilog, and various scripting languages to optimize designs. This role requires 8+ years of experience in digital logic design.

Rtl Design Engineer
Amazon is hiring a Senior RTL Design Engineer to define micro-architecture and implement RTL for advanced functional blocks. You'll work with Verilog and VHDL in Bengaluru, collaborating with multi-disciplinary teams to develop world-class hardware devices.