Tech Jobs

Graphcore • Bengaluru - On-Site

Graphcore is hiring a Silicon Logical Design Engineer to work within the logical design team, responsible for delivering high-quality microarchitecture and RTL for Graphcore chips. You'll work with technologies like C, C++, and Verilog in Bengaluru.

Google • Sunnyvale - On-Site

Google is hiring a Staff ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. You'll work with UVM and SystemVerilog to verify complex digital designs, particularly focusing on TPU architecture. This position requires 10 years of experience in verification methodologies.

Apple • Santa Clara - On-Site

Apple is seeking a Standard Cell Design Methodology & Flow Engineer to contribute to cutting-edge processor design. You'll work with Verilog and SystemVerilog, applying machine learning techniques to enhance circuit performance. This role requires a strong background in digital design engineering.

Apple • Austin - On-Site

Apple is seeking a Design Verification Lead to guide high-caliber verification teams in developing cutting-edge silicon IPs. You'll provide technical leadership and implement verification strategies using SystemVerilog and UVM methodologies. This role requires significant experience in silicon design verification.

Google • Taipei - On-Site

Google is hiring a Senior Silicon Bring Up and Test Manager to lead the development of custom silicon solutions. You'll work with ASIC and SoC design, utilizing EDA tools and DFT techniques. This position requires 8 years of experience in the field.

Apple • London - On-Site

Apple is hiring a Design Verification Engineer to ensure the quality of complex graphics IP designs. You'll work with C++, SystemVerilog, and UVM in the London office. This role requires a strong background in graphics or computer architecture.

Apple • Cambridge - On-Site

Apple is hiring a Senior GPU Top Design Engineer to work on complex GPU projects. You'll collaborate with various teams to deliver high-quality graphics IP and drive micro-architectural improvements. This role requires expertise in design and proficiency in SystemVerilog or VHDL.

Apple • Cambridge - On-Site

Apple is hiring a Senior GPU Top Design Engineer to work on complex GPU projects. You'll collaborate with various teams to develop micro-architecture and RTL for critical top-level infrastructure IP. This role requires expertise in design and proficiency in SystemVerilog or VHDL.

Google • Mountain View - On-Site

Google is hiring a Senior Silicon Design Verification Engineer to work on YouTube Video Accelerators. You'll utilize SystemVerilog and UVM for verification methodologies and contribute to the development of custom silicon solutions. This position requires 8 years of experience in verification methodologies.

Apple • Cambridge - On-Site

Apple is hiring a GPU Top Design Engineer to work on complex GPU projects. You'll collaborate with various teams to develop micro-architecture and RTL for critical infrastructure IP. This role requires design experience and proficiency in SystemVerilog or VHDL.

Apple • Cambridge - On-Site

Apple is hiring a GPU Top Design Engineer to work on complex GPU projects. You'll collaborate with various teams to develop micro-architecture and RTL for critical top-level infrastructure IP. This role requires design experience and proficiency in SystemVerilog or VHDL.

Google • Bengaluru - On-Site

Google is hiring a Silicon Design Verification Engineer to shape the future of AI/ML hardware acceleration. You'll work with verification methodologies and languages like UVM and SystemVerilog to verify complex digital designs. This position requires 4 years of experience in verification methodology and IP design.

Google • Sunnyvale - On-Site

Google is hiring a SoC RTL Design Engineer to work on cutting-edge TPU technology. You'll focus on ASIC RTL design, collaborating with cross-functional teams to optimize clocking and timing-critical designs. This position requires 2+ years of experience in ASIC design.

Google • Sunnyvale - On-Site

Google is hiring an RTL Design Engineer to work on Cloud TPU technology. You'll design and debug ASIC RTL using SystemVerilog or Verilog, and collaborate with physical design teams. This position requires experience in ASIC design and scripting languages.

Google • Fremont - On-Site

Google is hiring a Senior Test and Validation Engineer to lead custom silicon bringup and validation efforts. You'll work with Verilog and SystemVerilog, focusing on DFT techniques and silicon validation. This position requires 10 years of experience in custom silicon design.

Google • Sunnyvale - On-Site

Google is hiring an ASIC Design Engineer to work on ML accelerators. You'll design and verify complex digital designs, focusing on TPU architecture. This position requires 2+ years of experience in RTL design and proficiency in Verilog or SystemVerilog.

Amazon • Bengaluru - On-Site

Amazon is hiring a Senior Design Verification Engineer to enhance hardware designs for their devices. You'll define verification methodologies and implement test plans while collaborating with cross-functional teams. This role requires experience in verification at multiple levels of logic.

Apple • Cupertino - On-Site

Apple is hiring an ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design validation and integration. This position is suitable for entry-level candidates with relevant coursework.

Apple • Cupertino - On-Site

Apple is hiring an ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 3+ years of experience in ASIC design.

Apple • Cupertino - On-Site

Apple is hiring a Senior ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 8+ years of experience in ASIC design.

Google • Austin

Google is hiring a CPU RTL Engineer to develop custom silicon solutions that power innovative products. You'll work with Verilog, SystemVerilog, and microprocessor architecture. This position requires 4 years of experience in digital logic design.

Google • Austin

Google is hiring a Senior CPU Formal Verification Engineer to verify digital logic for ASICs and contribute to custom silicon solutions. You'll work with SystemVerilog and formal verification tools across multiple locations including Austin and Mountain View.

Google • Sunnyvale - On-Site

Google is hiring a Senior ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. You'll leverage your expertise in SystemVerilog and UVM to verify complex digital designs for Google's TPU technology. This position requires 8+ years of experience in design verification.

Google • Bengaluru

Google is hiring a Senior Design Verification Engineer to contribute to the development of custom silicon solutions. You'll work with Python, Perl, SystemVerilog, and UVM to automate verification environments and ensure high-quality designs. This role requires 8 years of experience in design verification.

Google • Bengaluru

Google is hiring a Senior ASIC RTL Engineer to develop custom silicon solutions for their products. You'll work with Verilog, SystemVerilog, and ASIC design methodologies. This position requires 8 years of experience in digital logic design.