About Apple
The personal technology company redefining user experience
Key Highlights
- Market cap of $3 trillion as of 2022
- Over 1 billion active devices worldwide
- Comprehensive medical plans including mental healthcare
- Paid parental leave and gradual return-to-work program
Apple Inc. (NASDAQ: AAPL), headquartered in Cupertino, CA, is the world's most valuable company with a market capitalization of $3 trillion as of 2022. Known for its iconic products such as the iPhone, iPad, and Mac, Apple serves over 1 billion active devices globally. The company has a strong commi...
π Benefits
Apple offers comprehensive medical plans covering physical and mental healthcare, paid parental leave, and a gradual return-to-work program. Employees...
π Culture
Apple's culture emphasizes an obsessive focus on user experience and consumer privacy, setting it apart from competitors. The company promotes inclusi...
Overview
Apple is hiring a Cellular SoC Static Timing Analysis Engineer to work on innovative 5G modem platforms. You'll be responsible for timing analysis and closure in chip design. This position requires 10+ years of relevant industry experience.
Job Description
Who you are
You have a strong background in ASIC design and a passion for pushing the limits of technology. With over 10 years of experience in the semiconductor industry, you've developed a deep understanding of static timing analysis and its critical role in chip design. Your expertise allows you to work effectively with designers to generate timing constraints and ensure timing closure across complex SoCs. You thrive in collaborative environments, working closely with multi-functional teams to resolve sophisticated timing issues.
Your experience spans various aspects of SOC design, and you are well-versed in deep sub-micron technologies targeted for high-end mobile applications. You possess a Bachelor's degree in a relevant field, and your technical skills are complemented by your ability to communicate complex concepts clearly to both technical and non-technical stakeholders. You are committed to continuous learning and innovation, always seeking to improve processes and outcomes.
What you'll do
As a Cellular SoC Static Timing Analysis Engineer at Apple, you will own the timing closure process for both full chip and block-level designs throughout the entire project lifecycle. You will generate block and full chip timing constraints, ensuring that all timing requirements are met across various corners, modes, and conditions. Your role will involve close collaboration with designers to construct and modify flows that enhance timing analysis and closure.
You will be responsible for timing sign-off, ensuring that all aspects of timing are thoroughly validated before the final product release. This includes working on Appleβs cutting-edge 5G modem platforms, where your contributions will directly impact the performance and efficiency of Apple products. You will engage with cross-functional teams to troubleshoot and resolve complex timing issues, leveraging your expertise to drive innovative solutions.
What we offer
At Apple, you will be part of a world-class modem team, contributing to the development of industry-leading connectivity technologies. We offer a collaborative and inclusive work environment where your ideas and contributions are valued. You will have the opportunity to work on groundbreaking projects that shape the future of mobile technology. Apple is committed to fostering a culture of innovation and excellence, providing you with the resources and support needed to succeed in your role.
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