
About Apple
The personal technology company redefining user experience
Key Highlights
- Market cap of $3 trillion as of 2022
- Over 1 billion active devices worldwide
- Comprehensive medical plans including mental healthcare
- Paid parental leave and gradual return-to-work program
Apple Inc. (NASDAQ: AAPL), headquartered in Cupertino, CA, is the world's most valuable company with a market capitalization of $3 trillion as of 2022. Known for its iconic products such as the iPhone, iPad, and Mac, Apple serves over 1 billion active devices globally. The company has a strong commi...
π Benefits
Apple offers comprehensive medical plans covering physical and mental healthcare, paid parental leave, and a gradual return-to-work program. Employees...
π Culture
Apple's culture emphasizes an obsessive focus on user experience and consumer privacy, setting it apart from competitors. The company promotes inclusi...
Skills & Technologies
Overview
Apple is hiring a Cellular SoC Static Timing Analysis Engineer to work on innovative 5G modem platforms. You'll be responsible for timing analysis and closure in chip design, ensuring high performance and energy efficiency. This role requires 3+ years of relevant industry experience.
Job Description
Who you are
You have a Bachelor's degree and at least 3 years of relevant industry experience in ASIC design and static timing analysis. You thrive on pushing the limits of technology and have a strong understanding of timing constraints and timing closure processes. Your passion for invention drives you to innovate and improve existing technologies, particularly in the realm of cellular systems. You are adept at collaborating with multi-functional teams to resolve complex timing issues and ensure that all timing requirements are met across various conditions.
Your experience includes working with deep sub-micron technologies and high-end mobile applications, giving you a solid foundation in the intricacies of System-on-Chip (SoC) design. You possess strong analytical skills and are comfortable working with sophisticated tools and methodologies to achieve timing sign-off. You are detail-oriented and understand the importance of precision in chip design, which is critical for the performance of Appleβs products.
What you'll do
As a Cellular SoC Static Timing Analysis Engineer, you will take ownership of full chip and block level timing closure throughout the entire project lifecycle. You will generate block and full chip timing constraints, ensuring that all timing requirements are met before tape-out. Your role will involve close collaboration with designers to construct and modify flows that enhance timing analysis processes. You will work on resolving sophisticated timing issues for major building blocks of Appleβs advanced SoCs, contributing to the development of industry-leading connectivity performance.
You will be at the forefront of innovation, helping to shape the future of cellular technologies that power Appleβs products. Your contributions will directly impact the performance and efficiency of the 5G modem platforms, ensuring that they meet the high standards expected by millions of users. You will also have the opportunity to mentor junior engineers and share your expertise within the team, fostering a culture of continuous improvement and learning.
What we offer
Apple provides a dynamic work environment where innovation is encouraged and supported. You will have the chance to work on cutting-edge technologies that are shaping the future of mobile connectivity. The company values diversity and inclusion, ensuring that all employees feel welcome and valued. You will be part of a world-class team that is dedicated to pushing the boundaries of what is possible in chip design and cellular technology. Competitive compensation and benefits are part of the package, reflecting the importance of your role in the organization.
Interested in this role?
Apply now or save it for later. Get alerts for similar jobs at Apple.
Similar Jobs You Might Like
Based on your interests and this role

Cellular Soc Static Timing Analysis Engineer
Apple is hiring a Cellular SoC Static Timing Analysis Engineer to work on innovative 5G modem platforms. You'll be responsible for timing analysis and closure in chip design. This position requires 10+ years of relevant industry experience.

Asic Engineer
Apple is hiring a Cellular SoC Static Timing Analysis Engineer to work on innovative 5G modem platforms. You'll be responsible for timing analysis and closure in chip design, requiring expertise in ASIC and SoC technologies.

Asic Engineer
Apple is hiring a Senior ASIC Engineer to work on cutting-edge 5G modem platforms. You'll be responsible for timing analysis and closure in complex SoC designs. This position requires 10+ years of relevant industry experience.

Electrical Engineer
Google is hiring a Senior DFT Static Timing Analysis Engineer to drive cutting-edge TPU technology and ensure successful timing closure. You'll work with EDA tools and static timing analysis methodologies. This position requires 5+ years of experience in static timing and DFT architectures.

Timing & Synthesis Engineer
Apple is hiring a Timing & Synthesis Engineer to join their wireless silicon development team in San Diego. You'll work on developing Wireless SoCs with custom hardware accelerators and collaborate with SoC architects to meet power, performance, and area goals. This position requires a Bachelor's degree and 3+ years of relevant industry experience.