
About Apple
The personal technology company redefining user experience
Key Highlights
- Market cap of $3 trillion as of 2022
- Over 1 billion active devices worldwide
- Comprehensive medical plans including mental healthcare
- Paid parental leave and gradual return-to-work program
Apple Inc. (NASDAQ: AAPL), headquartered in Cupertino, CA, is the world's most valuable company with a market capitalization of $3 trillion as of 2022. Known for its iconic products such as the iPhone, iPad, and Mac, Apple serves over 1 billion active devices globally. The company has a strong commi...
🎁 Benefits
Apple offers comprehensive medical plans covering physical and mental healthcare, paid parental leave, and a gradual return-to-work program. Employees...
🌟 Culture
Apple's culture emphasizes an obsessive focus on user experience and consumer privacy, setting it apart from competitors. The company promotes inclusi...
Skills & Technologies
Overview
Apple is hiring a FE Design and Timing Engineer to work on high-performance, low-power wireless SoCs. You'll collaborate with multi-disciplinary teams to meet power, performance, and area goals. This position requires experience in VLSI and RTL design.
Job Description
Who you are
You have a strong background in electrical engineering, particularly in VLSI and RTL design, with a focus on implementing high-performance, low-power wireless SoCs. You thrive in collaborative environments and enjoy working closely with various teams to achieve design goals. Your experience includes working with design verification and test validation processes, ensuring that designs meet the highest quality standards. You are detail-oriented and understand the importance of timing closure in the ASIC creation process. You are comfortable navigating complex technical discussions and can effectively communicate with RTL designers, CAD teams, and physical design teams.
What you'll do
In this role, you will be responsible for implementing high-performance, low-power wireless SoCs from RTL to GDSII delivery. You will collaborate with RTL designers to understand design intent and clock structure, and work with CAD teams to develop effective design flows. You will also interact with UPF and DFT teams to insert power and test structures, ensuring that designs are delivered on time and meet quality standards. Your contributions will have a critical impact on the ASIC creation effort, as you will interface with all disciplines involved in the design process. You will be expected to incorporate targeted checks at every stage of the design process to ensure the highest quality outcomes.
What we offer
At Apple, you will be part of a world-class vertically integrated engineering team that emphasizes innovation and collaboration. You will have the opportunity to work on cutting-edge technologies that transform user experiences at the product level. We encourage you to apply even if your experience doesn't match every requirement, as we value diverse perspectives and backgrounds. Join us in shaping the future of wireless technology.
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