Tech Jobs

Apple • Cupertino - On-Site

Apple is hiring an ASIC Design Engineer to work on Pixel IP DMA design. You'll collaborate with architecture and verification teams to build high-performance, low-power DMA engines. This role requires a Bachelor's degree and 3+ years of experience in multimedia IP/SoC front-end ASIC RTL design.

Apple • Austin - On-Site

Apple is hiring a GPU Top Level Physical Design Engineer to design and manufacture high-performance GPUs. You'll work with ASIC integration and physical design methodologies in Austin. This role requires a BS degree and 3+ years of relevant experience.

Google • Sunnyvale - On-Site

Google is hiring a Lead Engineer for Silicon and Software Integration to drive the development of cutting-edge TPU technology. You'll work with C++ and Python, focusing on hardware/software integration and firmware development. This role requires 8+ years of experience in computer architecture or embedded systems.

Amazon • Bengaluru - On-Site

Amazon is hiring a Senior ISP Designer to architect and design advanced imaging hardware for new devices. You'll work closely with multi-disciplinary teams and require experience in RTL development environments.

Apple • Sunnyvale - On-Site

Apple is hiring an FPGA Prototyping Design Engineer to develop Wireless SoCs with custom hardware accelerators. You'll work closely with SoC architects and IP developers, focusing on energy-efficient design. This position requires experience in FPGA and VLSI design.

Amazon • Bengaluru - On-Site

Amazon is hiring an ASIC Engineer specializing in Physical Design to innovate on silicon IP for Echo devices. You'll work with RTL designers and drive physical design closure while collaborating with third-party services. This role requires 5+ years of experience in ASIC Physical Design.

Apple • San Diego - On-Site

Apple is hiring a Wireless SoC Design Engineer to develop microarchitecture and RTL for System-on-Chip designs. You'll collaborate with cross-functional teams to ensure successful integration and optimization of performance, power, and area. This position requires 3+ years of relevant industry experience.

Apple • San Diego - On-Site

Apple is hiring a Wireless SoC Design Engineer to develop microarchitecture and RTL for System-on-Chip designs. You'll collaborate with cross-functional teams to ensure successful integration and optimization of performance, power, and area. This position requires 3+ years of relevant industry experience.

OpenAI • San Francisco - Hybrid

OpenAI is hiring a Junior RTL & Co-design Engineer to design and implement key components for AI accelerators. You'll work closely with various engineering teams to translate AI workloads into efficient hardware structures. This role is based in San Francisco with a hybrid work model.

Amazon • Austin - On-Site

Amazon is hiring a Senior ASIC Design Engineer for the Amazon Leo initiative to develop custom ASIC blocks for satellite technology. You'll work with RTL design, gate-level simulation, and SoC integration in Austin, Texas.

Apple • San Diego - On-Site

Apple is hiring a Mixed-Signal IP Firmware Engineer to develop firmware for critical features in SOCs. You'll work with C and ARM CPUs, focusing on post-silicon bringup and validation. This position requires 3+ years of relevant experience.

Apple • Austin - On-Site

Apple is hiring an ASIC Design Engineer to design and integrate interconnect fabrics into SoCs. You'll work closely with multi-disciplinary teams and require expertise in RTL development and interconnect architectures. This position requires a minimum of 3 years of relevant industry experience.

Apple • Austin - On-Site

Apple is hiring a Senior ASIC Design Engineer to design and integrate interconnect fabrics into SoCs. You'll work with RTL development and collaborate with multi-disciplinary teams in Austin. This role requires extensive experience in chip design and interconnect architectures.

Apple • Cupertino - On-Site

Apple is hiring a Senior Firmware Engineer to develop firmware for mixed-signal IPs within SOCs. You'll work with C and assembly language, focusing on post-silicon bringup and validation. This role requires 10+ years of relevant experience.

Amazon • Tel Aviv Yafo

Amazon is hiring an ASIC Design Engineer for their Cloud-Scale Machine Learning Acceleration team. You'll be responsible for integrating subsystems and delivering high-performance RTL designs. This role requires expertise in SystemVerilog and ASIC design principles.

Apple • Austin - On-Site

Apple is hiring a DDR Design Engineer to craft high-performance PHY designs for upcoming products. You'll be involved in all phases of design, from concept to silicon bring-up, requiring expertise in RTL and verification processes.

Apple • Cupertino - On-Site

Apple is hiring a DDR Design Engineer to craft high-performance PHY designs for upcoming products. You'll be involved in all phases of design, from concept to silicon characterization, requiring expertise in RTL and verification.

Apple • Beaverton - On-Site

Apple is hiring a DDR Design Engineer to craft high-performance PHY designs for upcoming products. You'll be involved in all phases of design, from concept to silicon bring-up, requiring expertise in RTL and verification processes.

Apple • San Diego - On-Site

Apple is seeking a DDR Design Engineer to craft high-performance PHY designs for upcoming products. You'll be involved in all phases of design, from concept to silicon characterization, requiring expertise in RTL and verification processes.

Apple • Waltham - On-Site

Apple is hiring a DDR Design Engineer to craft high-performance PHY designs for upcoming products. You'll be involved in all phases of design, from concept to silicon characterization, requiring expertise in RTL and verification.

Apple • Beaverton - On-Site

Apple is hiring a Senior DDR Design Engineer to craft high-performance PHY designs for upcoming products. You'll be involved in all phases of design, from concept to silicon bring-up, requiring expertise in RTL and verification.

Apple • Cupertino - On-Site

Apple is hiring a DDR Design Engineer to craft high-performance PHY designs for upcoming products. You'll be involved in all phases of design, from concept to silicon bring-up, requiring expertise in RTL and verification. This role demands a minimum of 10 years of relevant experience.

Apple • Waltham - On-Site

Apple is hiring a Senior DDR Design Engineer to craft high-performance PHY designs for upcoming products. You'll be involved in all phases of design, from concept to silicon bring-up, requiring expertise in RTL and verification.

Apple • Austin - On-Site

Apple is hiring a Senior DDR Design Engineer to craft high-performance PHY designs for upcoming products. You'll be involved in all phases of design, from concept to silicon characterization, requiring expertise in RTL and verification processes.

Apple • San Diego - On-Site

Apple is hiring a DDR Design Engineer to craft high-performance PHY designs for upcoming products. You'll be involved in all phases of design, from concept to silicon characterization, requiring expertise in RTL and verification processes.