Wireless Design Verification Engineer • Mid-Level

Who you are

You have a Bachelor's degree and at least 3 years of relevant industry experience, particularly in verification of wireless or wired communication blocks. Your expertise includes advanced knowledge of Verilog, SystemVerilog, UVM, and SystemVerilog Assertion, which you have applied in practical scenarios to ensure high-quality design verification.

You are familiar with ASIC verification flows, including test bench development and constrained random DV methodology. Your experience has equipped you with the ability to develop reusable testbenches and verification environments, ensuring that you can deploy the latest methodologies effectively.

What you'll do

In this role, you will be at the center of a silicon design group, playing a critical role in delivering world-class silicon for wireless products. You will interact with DV methodologists, designers, and communication systems engineers to develop and implement verification strategies that ensure the highest design quality.

Your responsibilities will include pre-silicon RTL verification of wireless MAC and its interfaces with the rest of the wireless SoC. You will be tasked with ensuring that the verification environment is robust and metric-driven, allowing for efficient testing and validation of designs.

What we offer

Apple offers a dynamic work environment where you will be part of a world-class vertically integrated engineering team. You will have the opportunity to work on cutting-edge technologies that transform user experiences at the product level. The role provides a chance to contribute to projects that impact hundreds of millions of customers worldwide, making your work meaningful and impactful.