OpenAI

About OpenAI

Empowering humanity through safe AI innovation

🏢 Tech👥 1001+ employees📅 Founded 2015📍 Mission District, San Francisco, CA💰 $68.9b4.2
B2CB2BArtificial IntelligenceEnterpriseSaaSAPIDevOps

Key Highlights

  • Headquartered in San Francisco, CA with 1,001+ employees
  • $68.9 billion raised in funding from top investors
  • Launched ChatGPT, gaining 1 million users in 5 days
  • 20-week paid parental leave and unlimited PTO policy

OpenAI is a leading AI research and development platform headquartered in the Mission District of San Francisco, CA. With over 1,001 employees, OpenAI has raised $68.9 billion in funding and is known for its groundbreaking products like ChatGPT, which gained over 1 million users within just five day...

🎁 Benefits

OpenAI offers flexible work hours and encourages unlimited paid time off, promoting at least 4 weeks of vacation per year. Employees enjoy comprehensi...

🌟 Culture

OpenAI's culture is centered around its mission to ensure that AGI benefits all of humanity. The company values transparency and ethical consideration...

Overview

OpenAI is hiring a RTL & Codesign Engineer to design and implement key components for custom AI accelerators. You'll work closely with architecture and verification teams using skills in Python, C++, and RTL design. This role is based in San Francisco with a hybrid work model.

Job Description

Who you are

You have a strong background in hardware design, particularly in RTL and microarchitecture, with experience in developing production-quality designs for complex systems. Your expertise in languages such as Verilog and SystemVerilog allows you to create efficient hardware structures tailored for AI workloads. You are comfortable collaborating with cross-functional teams, including software and verification engineers, to ensure seamless integration of hardware and software components.

You possess a solid understanding of performance modeling and feasibility analysis, enabling you to contribute effectively to architectural studies. Your hands-on experience in designing compute, memory, and interconnect components for accelerators makes you a valuable asset to the team. You thrive in a collaborative environment and are eager to take ownership of your projects, ensuring high standards of quality and performance.

What you'll do

In this role, you will produce clean, production-quality microarchitecture and RTL for major accelerator subsystems, playing a crucial part in the development of OpenAI's next-generation AI-native silicon. You will collaborate closely with architecture, verification, physical design, and machine learning engineers to translate AI workloads into efficient hardware structures. Your responsibilities will include conducting architectural studies, contributing to performance modeling, and ensuring functional correctness through partnership with design verification and physical design teams.

You will also be involved in building and reviewing performance metrics, ensuring that all designs meet area and power targets while achieving timing closure. Your role will require you to engage in hands-on design work, providing you with significant ownership across definition, modeling, and implementation phases. You will be part of a team that is dedicated to pushing the boundaries of AI hardware, and your contributions will directly impact the performance of OpenAI's supercomputing infrastructure.

What we offer

OpenAI provides a dynamic work environment where innovation is encouraged, and collaboration is key. You will have the opportunity to work on cutting-edge technology that shapes the future of AI. We offer a hybrid work model, allowing you to balance in-office collaboration with remote work flexibility. Additionally, we provide relocation assistance to new employees, ensuring a smooth transition to our San Francisco office. Join us in our mission to develop advanced AI solutions and make a meaningful impact in the tech industry.

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