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Apple • Beaverton - On-Site

Apple is hiring a Senior CPU Design Timing Engineer to drive timing closure for CPU projects. You'll work with static timing analysis tools like PrimeTime and Tempus, focusing on timing analysis and noise management. This role requires 10+ years of relevant experience.

Static timing analysis Primetime Tempus Timing analysis Noise analysis Variation modeling

2 months ago

Hardware Engineer

Apple • Santa Clara - On-Site

Apple is hiring a CPU Design Timing Engineer to drive timing closure for CPU projects. You'll collaborate with CAD teams and micro-architects, utilizing skills in TCL, Python, and static timing analysis. This position requires 3+ years of relevant experience.

Tcl Python Perl Static timing analysis Noise analysis Variation modeling

3 months ago

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