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Google • Sunnyvale - On-Site
Google is seeking a Physical Design Engineer, University Graduate, PhD to contribute to the design and closure of custom silicon solutions for AI/ML hardware acceleration. You'll work with technologies like Python, Verilog, and various physical design principles. This entry-level position is based in Sunnyvale, CA.

Apple • Beaverton - On-Site
Apple is hiring a Senior CPU Design Timing Engineer to drive timing closure for CPU projects. You'll work with static timing analysis tools like PrimeTime and Tempus, focusing on timing analysis and noise management. This role requires 10+ years of relevant experience.

Apple • Beaverton - On-Site
Apple is hiring a Senior CPU Design Timing Engineer to drive timing closure for CPU projects. You'll work with static timing analysis tools like PrimeTime and Tempus, focusing on timing analysis across multiple clock and power domains. This position requires 10+ years of relevant experience.

Apple • Santa Clara - On-Site
Apple is hiring a CPU Design Timing Engineer to drive timing closure for CPU projects. You'll collaborate with CAD teams and micro-architects, utilizing skills in TCL, Python, and static timing analysis. This position requires 3+ years of relevant experience.