Hardware Engineer • Mid-Level

Who you are

You have a Bachelor's degree and at least 3 years of relevant experience in CPU design and timing analysis. Your expertise includes static timing analysis and noise analysis, and you are skilled in scripting languages such as TCL and either Perl or Python. You understand variation modeling and have a strong foundation in timing closure processes. You thrive in collaborative environments, working closely with micro-architects and implementation engineers to achieve project goals.

What you'll do

As a CPU Design Timing Engineer at Apple, you will be responsible for all aspects of timing closure for CPU projects. You will work with the CAD team to develop and improve timing flows, enhancing analysis efficiency through scripting. Your role will involve extensive collaboration with CPU micro-architects and implementation engineers to drive timing closure, ensuring that designs meet performance and reliability standards. You will also be involved in fixing noise issues in designs and conducting thorough timing analysis to support project objectives.

What we offer

At Apple, you will be part of a team that values innovation and excellence. We provide a dynamic work environment where your contributions can lead to groundbreaking products. You will have opportunities for professional growth and development, working alongside some of the brightest minds in the industry. We encourage you to apply even if your experience doesn't match every requirement, as we believe diverse perspectives enhance our team.