Apple

About Apple

The personal technology company redefining user experience

🏢 Tech, Hardware👥 1001+ employees📅 Founded 1976📍 Cupertino, CA4.2
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Key Highlights

  • Market cap of $3 trillion as of 2022
  • Over 1 billion active devices worldwide
  • Comprehensive medical plans including mental healthcare
  • Paid parental leave and gradual return-to-work program

Apple Inc. (NASDAQ: AAPL), headquartered in Cupertino, CA, is the world's most valuable company with a market capitalization of $3 trillion as of 2022. Known for its iconic products such as the iPhone, iPad, and Mac, Apple serves over 1 billion active devices globally. The company has a strong commi...

🎁 Benefits

Apple offers comprehensive medical plans covering physical and mental healthcare, paid parental leave, and a gradual return-to-work program. Employees...

🌟 Culture

Apple's culture emphasizes an obsessive focus on user experience and consumer privacy, setting it apart from competitors. The company promotes inclusi...

Overview

Apple is hiring a Physical Design Engineer to contribute to high-performance PHY designs. You'll work with CAD, timing, and logic design teams to deliver outstanding designs. This role requires experience in physical design from RTL to GDSII.

Job Description

Who you are

You have a strong background in physical design engineering, with experience in crafting high-performance PHY designs from RTL to GDSII. Your expertise includes generating block and chip-level static timing constraints, ensuring that designs meet timing, area, and power constraints. You are familiar with building full chip floor-plans, including pin placement, partitions, and power grids, and you have a keen understanding of low power clock network guidelines.

You are adept at performing block-level place and route, and you have experience implementing ECOs to address timing, noise, and EM IR violations. Your knowledge extends to running physical design verification flows at both chip and block levels, providing guidelines to fix LVS and DRC violations. You are also involved in establishing CAD and physical design methodologies, contributing to correct-by-construction designs.

What you'll do

In this role, you will be at the center of a PHY design effort, collaborating closely with architecture, CAD, timing, and logic design teams. Your responsibilities will include generating static timing constraints and developing methodologies for physical design. You will build full chip floor-plans and validate high-performance low power clock networks, ensuring that all designs meet stringent performance criteria.

You will also perform block-level place and route, working diligently to close designs while adhering to timing, area, and power constraints. Your role will involve generating and implementing ECOs to resolve any timing, noise, and EM IR violations that arise during the design process. Additionally, you will run physical design verification flows, providing critical feedback and guidelines to other designers to ensure compliance with LVS and DRC standards.

As a member of the team, you will participate in establishing best practices for CAD and physical design methodologies, contributing to the development of flows for chip integration. Your work will have a significant impact on the delivery of outstanding PHY designs that will delight millions of Apple customers.

What we offer

Apple offers a dynamic work environment where innovation and creativity are encouraged. You will have the opportunity to work on cutting-edge technology that shapes the future of consumer electronics. We provide competitive compensation and benefits, along with opportunities for professional growth and development within the company. Join us in crafting products that enrich people's lives and change the game in technology.

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