
About Apple
The personal technology company redefining user experience
Key Highlights
- Market cap of $3 trillion as of 2022
- Over 1 billion active devices worldwide
- Comprehensive medical plans including mental healthcare
- Paid parental leave and gradual return-to-work program
Apple Inc. (NASDAQ: AAPL), headquartered in Cupertino, CA, is the world's most valuable company with a market capitalization of $3 trillion as of 2022. Known for its iconic products such as the iPhone, iPad, and Mac, Apple serves over 1 billion active devices globally. The company has a strong commi...
🎁 Benefits
Apple offers comprehensive medical plans covering physical and mental healthcare, paid parental leave, and a gradual return-to-work program. Employees...
🌟 Culture
Apple's culture emphasizes an obsessive focus on user experience and consumer privacy, setting it apart from competitors. The company promotes inclusi...
Skills & Technologies
Overview
Apple is hiring a Physical Design Engineer to contribute to high-performance PHY design from RTL to GDSII delivery. You'll work with CAD, timing, and logic design teams to ensure outstanding PHY designs. This role requires experience in physical design methodologies and tools.
Job Description
Who you are
You have a strong background in physical design engineering, with experience in crafting high-performance PHY designs from RTL to GDSII. Your expertise includes generating block and chip-level static timing constraints, and you are adept at building full chip floor-plans that include pin placement, partitions, and power grids. You have a proven track record of developing and validating low power clock network guidelines, ensuring that designs meet stringent timing, area, and power constraints.
You are skilled in performing block-level place and route, and you have experience implementing ECOs to address timing, noise, and EM IR violations. Your familiarity with physical design verification flows at both chip and block levels allows you to provide valuable guidelines to other designers for fixing LVS and DRC violations. You are also involved in establishing CAD and physical design methodologies that promote correct-by-construction designs, contributing to the overall success of the design process.
What you'll do
In this role, you will be at the center of a PHY design effort, collaborating closely with architecture, CAD, timing, and logic design teams. Your responsibilities will include generating static timing constraints and building comprehensive chip floor-plans. You will develop guidelines for low power clock networks and perform block-level place and route to ensure designs meet all necessary constraints. You will also run physical design verification flows and assist in establishing methodologies for correct designs.
You will participate in flow development for chip integration, ensuring that all aspects of the design process are optimized for performance and efficiency. Your contributions will have a significant impact on the delivery of outstanding PHY designs that delight millions of Apple customers. You will work in a collaborative environment that encourages innovation and problem-solving, allowing you to tackle challenges that have yet to be solved in the industry.
What we offer
Apple offers a dynamic work environment where you can contribute to cutting-edge technology that enriches people's lives. You will be part of a team that values hard work and forward-thinking, providing you with opportunities to grow and develop your skills in physical design engineering. We encourage you to apply even if your experience doesn't match every requirement, as we believe in fostering a diverse and inclusive workplace.
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