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Google LLC, headquartered in Mountain View, California, is a global leader in internet-related services and products, including its flagship search engine, Google Search, and the Android operating system. With over 100,000 employees, Google also offers cloud computing services through Google Cloud P...

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Google

Test Automation Engineer Senior

GoogleFremont - On-Site

Posted 2w ago🏛️ On-SiteSeniorTest Automation Engineer📍 Fremont💰 $183,000 - $271,000 / yearly
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Skills & Technologies

Overview

Google is hiring a Senior Test and Validation Engineer to lead custom silicon bringup and validation efforts. You'll work with Verilog and SystemVerilog, focusing on DFT techniques and silicon validation. This position requires 10 years of experience in custom silicon design.

Job Description

Who you are

You have a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. With 8 years of experience in analog circuit design, you are well-versed in simulation and verification processes. Your expertise extends to working with relevant electronic design automation (EDA) tools for circuit design and analysis. Ideally, you hold a Master's degree or PhD in a related field, emphasizing computer architecture, and have accumulated 10 years of experience in custom silicon design, focusing on digital logic design, analog design, and test. You are familiar with advanced DFT techniques such as hierarchical DFT, compression, and diagnosis, and have hands-on experience with custom silicon bringup, leading test plan development, and performing in-depth silicon validation. Proficiency in hardware description languages, particularly Verilog and SystemVerilog, is essential for your role. You possess excellent problem-solving, communication, and teamwork abilities, making you a valuable asset to any team.

What you'll do

In this role, you will lead custom silicon bringup and Verilog code development, ensuring that the silicon meets performance and efficiency standards. You will be responsible for defining post-silicon validation specifications and executing in-depth debug processes. Collaborating closely with the Architecture, Physical Design, and Test Engineering teams, you will guarantee seamless integration and execution of the Design-for-Test (DFT) plan. Your responsibilities will include architecting, designing, and implementing digital logic utilizing Verilog or SystemVerilog, deriving from high-level specifications. You will also work with the verification team to meticulously define test plans, formulate assertions, and debug logic issues, contributing to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

What we offer

At Google, you will be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. We encourage you to apply even if your experience doesn't match every requirement, as we value diverse perspectives and backgrounds. You will have the opportunity to work in a collaborative environment that fosters innovation and creativity, with access to cutting-edge technologies and resources. Our commitment to employee growth means you will have ample opportunities for professional development and career advancement. Join us in shaping the future of technology and making a meaningful impact on the world.

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