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Google • Fremont - On-Site
Google is hiring a Senior Test and Validation Engineer to lead custom silicon bringup and validation efforts. You'll work with Verilog and SystemVerilog, focusing on DFT techniques and silicon validation. This position requires 10 years of experience in custom silicon design.

Google • Sunnyvale - On-Site
Google is hiring a Senior DFT Static Timing Analysis Engineer to drive cutting-edge TPU technology and ensure successful timing closure. You'll work with EDA tools and static timing analysis methodologies. This position requires 5+ years of experience in static timing and DFT architectures.

Google • Sunnyvale - On-Site
Google is seeking a DFT Engineer to work on cutting-edge TPU technology that powers AI/ML applications. You'll leverage your expertise in DFT architecture and verification, working with industry-standard methodologies and EDA tools. This role requires 3+ years of experience in DFT implementation and verification.

Google • Bengaluru
Google is seeking a Senior Silicon CAD Methodology Engineer to develop and support end-to-end chip design flows. You'll work with Python, C++, and EDA tools to innovate custom silicon solutions. This position requires 5+ years of experience in ASIC/SoC design or CAD/EDA methodology.

Meta (Facebook) • Sunnyvale - On-Site
Meta is seeking an ASIC Engineer Intern to join their Infrastructure organization. You'll participate in design implementation and physical design using state-of-the-art tools. This internship is ideal for those looking to gain hands-on experience in ASIC engineering.

OpenAI • San Francisco - On-Site
OpenAI is seeking a Physical Design Engineer to develop and optimize silicon designs for advanced AI systems. You'll work closely with RTL designers and utilize your expertise in physical design methodologies. This role requires a strong background in silicon implementation and design.

Apple • Austin
Apple is hiring a CPU Implementation Methodology Engineer to drive CPU design initiatives and improve implementation methodologies. You'll work with VLSI digital designs and collaborate with cross-functional teams. This position requires 3+ years of relevant industry experience.

ChipStack • San Jose - On-Site
ChipStack is hiring a Functional Verification Engineer to leverage AI in redefining verification methodologies for chip design. You'll work with UVM test benches and collaborate with machine learning engineers. This position requires extensive experience in semiconductor design.