Tech Jobs

Graphcore • Bristol

Graphcore is hiring a DFT Engineer to work on next-generation AI designs targeted for data center applications. You'll leverage your expertise in Design for Testability and related methodologies. This role requires a strong technical background and hands-on experience in DFT.

Apple • Cupertino - On-Site

Apple is hiring an ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design validation and integration. This position is suitable for entry-level candidates with relevant coursework.

Apple • Cupertino - On-Site

Apple is hiring an ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 3+ years of experience in ASIC design.

Apple • Cupertino - On-Site

Apple is hiring a Senior ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 8+ years of experience in ASIC design.

Apple • Cambridge - On-Site

Apple is hiring a GPU Physical Design Engineer to design and manufacture high-performance, power-efficient Graphics processors (GPUs). You'll work on ASIC implementation and collaborate with Front-End teams to optimize designs. This role requires a strong background in physical design and ASIC methodologies.

Amazon • Austin - On-Site

Amazon is hiring a Senior ASIC Design Engineer for the Amazon Leo initiative to develop custom ASIC blocks for satellite technology. You'll work with RTL design, gate-level simulation, and SoC integration in Austin, Texas.

Google • Bengaluru - On-Site

Google is hiring a Senior Silicon DFT Engineer to work on SOC Design for Test (DFT) Architecture. You'll utilize your expertise in DFT tools and techniques to implement and validate SOC designs. This position requires 5+ years of experience in SoC and DFT aspects.

Apple • Austin - On-Site

Apple is hiring an ASIC Design Engineer to design and integrate interconnect fabrics into SoCs. You'll work closely with multi-disciplinary teams and require expertise in RTL development and interconnect architectures. This position requires a minimum of 3 years of relevant industry experience.

Apple • Austin - On-Site

Apple is hiring a Senior ASIC Design Engineer to design and integrate interconnect fabrics into SoCs. You'll work with RTL development and collaborate with multi-disciplinary teams in Austin. This role requires extensive experience in chip design and interconnect architectures.

Neuralink • Austin

Neuralink is seeking a Senior Physical Design and Verification Engineer to lead RTL to GDSII physical design implementation. You'll utilize Electronic Design Automation tools and ensure high-quality design verification. This role requires a minimum of 5 years of experience in digital physical design.

Apple • Beaverton - On-Site

Apple is hiring a Senior ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 8+ years of experience in ASIC design.

Apple • Beaverton - On-Site

Apple is hiring a Senior ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of their products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 8+ years of experience in ASIC design.

Apple • Austin - On-Site

Apple is hiring a GPU Physical Design Engineer to lead timing closure for complex GPU designs. You'll collaborate with various teams to ensure optimal design practices. This position requires expertise in STA and physical design.

Apple • Austin - On-Site

Apple is hiring a Graphics FE Implementation Engineer to optimize and deliver world-class GPUs into Apple Silicon. You'll work closely with RTL and physical design teams, focusing on synthesis and optimization. This role requires experience in driving block level synthesis and debugging complex logic.

Apple • Austin - On-Site

Apple is hiring a Graphics FE Implementation Engineer to optimize and deliver world-class GPUs into Apple Silicon. You'll work closely with RTL and physical design teams, focusing on synthesis and optimization. This role requires experience in driving block-level synthesis and debugging complex logic.

Apple • Santa Clara - On-Site

Apple is hiring an Integration Engineer to work on ASIC design and integration of IP blocks into SoCs. You'll manage RTL codebases and ensure design quality through linting and synthesis. This role requires experience in hardware engineering and integration.

Apple • Santa Clara - On-Site

Apple is hiring a CPU Implementation Engineer to drive block-level design delivery and optimize CPU architecture. You'll work with RTL and GDS tools to enhance performance and yield. This position requires experience in hardware design and implementation.

Apple • Beaverton - On-Site

Apple is hiring a CPU Implementation Engineer to drive block-level design delivery and optimize CPU architecture. You'll work with RTL and GDS tools to achieve ambitious PPA goals in Beaverton.

Apple • Santa Clara - On-Site

Apple is hiring a CPU Gate Level Synthesis Engineer to optimize design quality for high-performance CPUs. You'll work with RTL to gate level synthesis and collaborate with cross-functional teams. This position requires experience in digital design and synthesis methodologies.

Apple • Cupertino - On-Site

Apple is hiring an ASIC Design Engineer to develop custom SoCs that enhance the performance and efficiency of its products. You'll work with SystemVerilog and engage in design, verification, and integration processes. This role requires 3+ years of experience in ASIC design.

Amazon • Hsinchu City - On-Site

Amazon is hiring an ASIC Design Engineer for their Camera ASIC Team in Hsinchu City. You'll work on state-of-the-art SoCs and contribute to the design and validation of energy-efficient silicon for Blink and Ring devices. This role requires experience in Verilog and digital design.

Apple • Austin

Apple is hiring a CPU Implementation Methodology Engineer to drive CPU design initiatives and improve implementation methodologies. You'll work with VLSI digital designs and collaborate with cross-functional teams. This position requires 3+ years of relevant industry experience.

Amazon • Cambridge - On-Site

Amazon is hiring a Senior ASIC Verification Engineer to join the Blink/Ring ASIC Team in Cambridge. You'll define architecture specifications, create microarchitecture specifications, and ensure quality through various verification processes. This role requires expertise in ASIC design and verification.

Apple • Santa Clara - On-Site

Apple is hiring an Integration Engineer to work on ASIC design and IP integration for their hardware products. You'll manage RTL codebases and ensure design quality through linting and synthesis. This role requires experience in complex hardware integration.

Apple • Santa Clara - On-Site

Apple is hiring a CPU Gate Level Synthesis Engineer to optimize design quality for high-performance CPUs. You'll work with RTL and synthesis methodologies in Santa Clara. This position requires experience in digital design and power analysis.