Tech Jobs

Apple • Cupertino - On-Site

Apple is seeking a Senior Analog IP Engineering Program Manager to drive the development of high-speed Analog and Mixed-signal IPs for System-on-Chips. You'll collaborate with various teams to ensure quality and success in product delivery.

Apple • Cupertino - On-Site

Apple is seeking a Lead Analog IP Engineering Program Manager to drive the development of high-speed Analog and Mixed-signal IPs for System-on-Chips. You'll collaborate with various teams to ensure quality and success in product delivery.

Amazon • Cupertino - On-Site

Amazon is hiring a Senior EMIR Engineer to contribute to the EMIR sign-off of SoCs for AI workloads. You'll work with power integrity and verification engineers to ensure high-quality designs. This role requires experience in EMIR analysis and power grid design.

Apple • Austin - On-Site

Apple is hiring a SoC Power Analysis and Optimization Engineer to drive automation for SOC power optimization. You'll work with Python and machine learning to enhance power efficiency in SOC designs. This position requires a minimum of 3 years of relevant industry experience.

Apple • Cupertino - On-Site

Apple is hiring a SoC Power Analysis and Optimization Engineer to drive automation for SOC power optimization. You'll work with Python and machine learning to enhance power efficiency. This position requires familiarity with ASIC power analysis and SOC design flow.

Apple • Waltham - On-Site

Apple is hiring a Timing Design Engineer to oversee timing sign-off and flow development for SoC design. You'll work closely with RTL designers and the Physical design team to ensure timing closure. This position requires a BS degree and a minimum of 3 years of relevant experience.

Amazon • Austin - On-Site

Amazon is hiring a Senior ASIC Design Engineer for the Amazon Leo initiative to develop custom ASIC blocks for satellite technology. You'll work with RTL design, gate-level simulation, and SoC integration in Austin, Texas.

Apple • Cupertino - On-Site

Apple is seeking a Timing Design Engineer to oversee timing sign-off and develop sign-off flows for SoC designs. You'll work closely with RTL designers and physical design teams, requiring expertise in ASIC design and timing analysis.

Apple • Austin - On-Site

Apple is seeking a Timing Design Engineer to oversee timing sign-off and develop sign-off flows for SoC design. You'll work closely with RTL designers and the Physical design team, requiring expertise in ASIC design and timing analysis.

Apple • Irvine - On-Site

Apple is hiring a Timing Radio Integration Engineer to integrate next-generation wireless SoCs into high-volume production. You'll work with embedded firmware and collaborate across various engineering fields. This position requires a minimum of 10 years of relevant industry experience.

Apple • Irvine - On-Site

Apple is hiring a Senior Timing Radio Integration Engineer to integrate next-generation wireless SoCs into high-volume production. You'll work with embedded firmware and sophisticated CMOS technology nodes in Irvine.

Apple • Irvine - On-Site

Apple is hiring an ASIC Power Engineer to drive SoC power simulation and optimization for next-generation wireless products. You'll work with power estimation and analysis to develop highly power-efficient SoCs. This position requires 3+ years of relevant experience.

Apple • Irvine - On-Site

Apple is hiring an ASIC Power Engineer to drive SoC power simulation and optimization for next-generation wireless products. You'll work with power estimation and optimization strategies, requiring expertise in power-critical designs.

Apple • Irvine - On-Site

Apple is hiring an ASIC Power Engineer to drive SoC power simulation, analysis, and optimization for next-generation wireless SOC products. You'll work with power estimation and optimization strategies to enhance power efficiency. This position requires 3+ years of relevant industry experience.

Apple • Irvine - On-Site

Apple is hiring a Senior ASIC Power Engineer to drive SoC power simulation, analysis, and optimization for next-generation wireless SOC products. You'll work on power estimation and optimization strategies, requiring deep technical expertise in power estimation.

Baidu • Sunnyvale - On-Site

Baidu is hiring a Low Power SoC Hardware Architect to design and define lower power subsystems for AI engines. You'll collaborate with a world-class team to improve power efficiency in both data center and edge SoCs. This position requires expertise in power optimization and SoC design.