Tech Jobs

Graphcore • Bristol

Graphcore is hiring a DFT Engineer to work on next-generation AI designs targeted for data center applications. You'll leverage your expertise in Design for Testability and related methodologies. This role requires a strong technical background and hands-on experience in DFT.

Apple • San Jose - On-Site

Apple is hiring a Senior SoC Physical Design Engineer to implement complete chip design from netlist to tapeout. You'll work closely with the front-end team and drive methodologies for physical design. This position requires 10+ years of experience in ASIC integration.

Google • Mountain View - On-Site

Google is hiring a Static Timing Analysis Manager to oversee full-chip implementation and silicon delivery. You'll work with STA sign-off and lead cross-functional teams in Mountain View, CA.

Google • Bengaluru

Google is hiring a Silicon AI/ML DFT Engineer to work on cutting-edge TPU technology that powers AI/ML applications. You'll leverage your expertise in DFT technologies and IC design to contribute to innovative silicon solutions. This role requires 3+ years of experience in DFT specification and analog or mixed-signal IC design.

Apple • Waltham - On-Site

Apple is hiring a Timing Design Engineer to oversee timing sign-off and flow development for SoC design. You'll work closely with RTL designers and the Physical design team to ensure timing closure. This position requires a BS degree and a minimum of 3 years of relevant experience.

Google • Bengaluru - On-Site

Google is hiring a Staff Silicon Digital Design Engineer to develop custom silicon solutions that power innovative products. You'll work with Verilog and System Verilog, focusing on design and verification processes. This position requires 10 years of experience in electrical engineering or a related field.

Apple • Austin - On-Site

Apple is seeking a Senior SoC Physical Design Engineer to lead physical design implementation from RTL to GDS. You'll work with cross-functional teams on high-performance and low-power designs, utilizing skills in physical design methodologies and tools.

Apple • Waltham - On-Site

Apple is seeking a Senior SoC Physical Design Engineer to lead physical design implementation from RTL to GDS. You'll work with cross-functional teams on high-performance and low-power designs, utilizing skills in physical design methodologies and tools.

Amazon • San Diego - On-Site

Amazon is hiring a Senior Physical Design Engineer to join the Amazon Leo initiative, focusing on defining and implementing digital chip SOCs for satellite communications. You'll work with ASIC design and RFIC teams, requiring expertise in ASIC and digital signal processing.

Apple • Austin - On-Site

Apple is hiring an ASIC Design Engineer to design and integrate interconnect fabrics into SoCs. You'll work closely with multi-disciplinary teams and require expertise in RTL development and interconnect architectures. This position requires a minimum of 3 years of relevant industry experience.

Apple • Austin - On-Site

Apple is hiring a Senior ASIC Design Engineer to design and integrate interconnect fabrics into SoCs. You'll work with RTL development and collaborate with multi-disciplinary teams in Austin. This role requires extensive experience in chip design and interconnect architectures.

Apple • San Jose - On-Site

Apple is hiring a SoC Physical Design Engineer to work on the physical implementation of complex SoC designs. You'll collaborate with design teams to improve timing and create documentation. This role requires a Bachelor's degree and experience with STA.

Apple • Beaverton - On-Site

Apple is hiring a SoC Physical Design Engineer to work on the physical implementation of complex SoC designs. You'll collaborate with design teams to improve timing and create documentation. This position requires a Bachelor's degree and experience with STA.

Apple • Cupertino - On-Site

Apple is seeking a Timing Design Engineer to oversee timing sign-off and develop sign-off flows for SoC designs. You'll work closely with RTL designers and physical design teams, requiring expertise in ASIC design and timing analysis.

Apple • Austin - On-Site

Apple is seeking a Timing Design Engineer to oversee timing sign-off and develop sign-off flows for SoC design. You'll work closely with RTL designers and the Physical design team, requiring expertise in ASIC design and timing analysis.

Apple • Austin - On-Site

Apple is hiring a GPU Physical Design Engineer to work on timing closure for complex GPU designs. You'll collaborate with various teams to ensure optimal design practices. This role requires experience in physical design and automation.

Apple • Austin - On-Site

Apple is hiring a GPU Physical Design Engineer to lead timing closure for complex GPU designs. You'll collaborate with various teams to ensure optimal design practices. This position requires expertise in STA and physical design.

Apple • Austin - On-Site

Apple is hiring a Senior SoC Physical Design Engineer to lead physical design implementation from RTL to GDS. You'll work with cross-functional teams to optimize chip architecture and tackle timing closure issues. This role requires 3+ years of relevant industry experience.